A LDMOS transistor device is characterized by low on-resistance and high breakdown voltage and is widespread applied in an integral part of modern day display panels, telecommunication systems, motor controllers, switch lock power supplies, inverters, and alike.
A typical LDMOS transistor device is an asymmetric power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate and coplanar drain/source regions separated by a channel region which are fabricated in an epitaxial layer of a substrate. Wherein the drain region is formed in a drift region which is fabricated by a lightly doped drain (LDD) implant process and used to isolate the drain and the channel regions. The drain region and the gate are laterally separated by a field oxide (FOX). While the LDMOS transistor device is operated in high voltage, electric field density around the drain region can be reduced due to the existence of the drift region and the FOX, such that the breakdown voltage of the LDMOS transistor device can be improved.
However, as the circuit critical dimensions continuing to shrinkage, parasitic circuit elements formed in the LDMOS transistor device may be more likely punch through due to the converse parasitic diode effect. Therefore, there is a need of providing an improved LDMOS transistor structure in order to obviate the drawbacks encountered from the prior art and improve the performance of the semiconductor device.